
Robert Triggs / Android Authority
TL;DR
- Google picked a mix of in-house designed and off-the-shelf IP for the upcoming Tensor G5.
- Many parts of the chip are built by other companies, including Arm, Imagination Technologies, VeriSillicon, and Synopsys.
- Google dropped its custom “BigWave” AV1 video codec in favor of an off-the-shelf solution.
It is no secret that the upcoming Google Tensor G5 inside the Pixel 10 series will be special — unlike all the current chips in the series, it will be built without Samsung’s help. We know that the chip will be built using TSMC’s 3nm-class process node and have had a good look at its core specs, but not much more than that. Building an entire SoC from scratch is a monumental task, which raises a question: how did Google, a relatively new company in the chip business, do it?
Thanks to a source inside Google, Android Authority has learned previously unknown Tensor G5 specs, giving us a unique insight into how it was created.
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How to build an SoC (fast)

Robert Triggs / Android Authority
Obviously, the most important parts of a modern SoC are the CPU and GPU. As we knew previously, Google has opted to license the Arm Cortex CPU cores, the same as those used in the Samsung-built Tensor chips. Unlike the previous chips, however, Google has picked a new IMG DXT GPU, replacing the Arm Mali graphics parts used in Tensor so far.
Samsung-built Tensor chips | Tensor G5 | |
---|---|---|
CPU |
Samsung-built Tensor chips
Arm Cortex |
Tensor G5
Arm Cortex |
GPU |
Samsung-built Tensor chips
Arm Mali |
Tensor G5
Imagination Technologies DXT |
The previous Tensor chips had some Google-designed IP blocks that have been carried over to the Tensor G5. The audio is processed on the “AoC” — “always-on compute,” a custom-built audio DSP first introduced in the original Tensor. The same goes for the “Emerald Hill” memory compressor.
Another noticeable thing that was carried over was the TPU. AI capabilities are one of the main justifications for why Tensor exists in the first place, so it isn’t surprising that Google brought it (or at least an evolved version) to the Tensor G5. Similarly, the “GXP” DSP, Google’s design built around licensed Tensillica Xtensa cores, was brought to the G5 to help with specific workloads, including image processing.
Samsung-built Tensor chips | Tensor G5 | |
---|---|---|
Audio processor |
Samsung-built Tensor chips
Google AoC |
Tensor G5
Google AoC |
Memory compressor |
Samsung-built Tensor chips
Google Emerald Hill |
Tensor G5
Google Emerald Hill |
DSP |
Samsung-built Tensor chips
Google GXP |
Tensor G5
Google GXP (next-generation) |
TPU |
Samsung-built Tensor chips
Google EdgeTPU |
Tensor G5
Google EdgeTPU (next-generation) |
This is where things start deviating from past generations — previous Tensor chips used a combination of two video codecs: Google’s “BigWave” AV1 codec core and Samsung’s MFC (Multi Format Codec) for the other formats. It would seem logical for Google to use something built in-house, perhaps even for all the formats, but that’s not the case. Instead, Google uses third party IP to handle all the formats. Specifically, the core used is Chips&Media’s WAVE677DV, spec’d to handle up to 4K120 encoding and decoding in AV1, VP9, HEVC and H.264.
Tensor G5 ditches Google’s custom AV1 codec in favor of an off-the-shelf solution.
Google has also decided to license a 3rd party display controller and 2D GPU. The core used is VeriSilicon’s DC9000. The previous Tensor chips used fully standard Exynos DPUs for this purpose.
Of course, cameras are one of the Pixel’s most important features, and Google has been working on building custom ISP hardware since the first Tensor chip. The previous chips only had a few custom Google-designed blocks to complement the regular Samsung ISPs, but that changes now. The Tensor G5 will have a fully custom ISP from the front-end to the back-end parts of the pipeline.
Samsung-built Tensor chips | Tensor G5 | |
---|---|---|
Video codec |
Samsung-built Tensor chips
Google “BigWave” (AV1 only) |
Tensor G5
Chips&Media WAVE677DV |
Video codec |
Samsung-built Tensor chips
Samsung MFC (other formats) |
Tensor G5
Chips&Media WAVE677DV |
Display controller/2D GPU |
Samsung-built Tensor chips
Samsung DPU |
Tensor G5
VeriSilicon DC9000 |
ISP |
Samsung-built Tensor chips
Samsung ISP with custom Google blocks |
Tensor G5
Fully custom Google ISP |
Google has custom-built built a few foundational parts for its chips, like a memory controller, system-level cache (GSLC), and clocking/power modules. That’s where Google’s involvement ends, however. The other parts of the chip, including many basic interfaces like USB, PCIe, I3C, as well as the physical layer controllers (PHYs) for interfaces like DSI (display), DisplayPort, and memory (LPDDR5x) are all licensed from various IP providers, mostly Synopsys.
Samsung-built Tensor chips | Tensor G5 | |
---|---|---|
MIPI DSI PHY, CSI PHY, DisplayPort PHY, I3C, I2C, SPI, LPDDR5x PHY |
Samsung-built Tensor chips
Samsung-built |
Tensor G5
Synopsys DesignWare IP cores |
SPMI controller |
Samsung-built Tensor chips
Samsung-built |
Tensor G5
SmartDV SPMI |
PWM controller |
Samsung-built Tensor chips
Samsung-built |
Tensor G5
Faraday Technologies FTPWMTMR010 |
UFS controller |
Samsung-built Tensor chips
Samsung-built |
Tensor G5
Most likely 3rd party, no information on the specific vendor |
USB3 core |
Samsung-built Tensor chips
Synopsys DesignWare USB3 |
Tensor G5
Synopsys DesignWare USB3 |
However, this isn’t an uncommon practice — some of these exact cores were even used by Samsung! This is because building and verifying IP is a costly endeavor with the potential for things to go wrong. It simply doesn’t usually make sense to build something that will only fulfill standard functions (like is the case with controllers for interfaces) when proven versions built by other companies can be licensed. Obviously, this limits flexibility, but in many cases, that’s an acceptable trade-off.
Google made the right choice partnering with Samsung

Robert Triggs / Android Authority
Even though Google’s Tensor G5 bids farewell to Samsung, it shows why the partnership was the right choice in the first place. Even years after first setting out with Tensor, Google still has to rely on 3rd party IP for most of its interfaces and functions. Besides the fact that it will be built on TSMC’s process, the Tensor G5 won’t be all that different from the previous Tensor chips. It still only has certain bits and pieces by Google, whereas the rest is generic and built by someone else, with the minor difference of who that someone is.
The partnership with Samsung has allowed Google to test and develop its own IP way before it was ready to use its own foundation for the chip, and now it’s finally mature enough to be on its own. I can’t wait to see how the future Tensor chips will evolve with the fundamentals now in place.
The Google Tensor G5 will arrive in the Pixel 10 series, launching later this year.
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